1. Field of the Invention
The present invention relates to a manufacturing method of semiconductor device, and more particularly, a method for forming a silicide layer on a fin structure.
2. Description of the Prior Art
Metal-oxide-semiconductors (MOS) are devices widely used in semiconductor integrated circuits. The quality of a MOS is particularly affected by the performances of the source and the drain. The gate usually comprises a polysilicon layer as a main conductive layer, and the source/drain region is formed on the silicon substrate by an implant process, a silicide layer is then formed on the polysilicon layer through a thermal process in order to decrease the sheet resistance of the gate and improve the operating speed of the MOS.
Some non-planar FET structures, such as finFETs, have well developed in recent years, by improving the channel width of the MOS and the density of the integrated circuits, and have been therefore widely used in the semiconductor industry. With the thickness of the fin getting always thinner, it becomes harder to form a silicide on the fin. Additionally, during the process for forming the silicide, an over heating during the thermal process may cause the silicide to penetrate the silicon substrate and may increase the leakage current, thereby further influencing the quality of the finFET.